Separate stored-charge recovery from capacitive current

A switching transient can contain different physical currents. Infineon's December 2015 article contrasts minority-carrier storage in a silicon pin diode with the ordinary majority-carrier behavior of its SiC Schottky example. In the bipolar account, injected carriers remain within the conducting device and must be removed before the blocking region can be re-established. Recovery therefore concerns stored charge and the transition back toward blocking, rather than simply the current present during forward conduction.

Capacitance introduces another route for transient current. A diode junction can exchange charge as its voltage changes even when minority-carrier recovery is very small. ROHM's bounded explanation explicitly retains this nonzero capacitive contribution. Calling a device majority carrier does not make its junction capacitance disappear, so a statement about stored-charge recovery must not become a claim that every reverse-directed transient current is absent.

The distinction is between mechanisms, rather than two interchangeable names for one waveform feature. Stored-carrier removal and capacitive displacement can both matter to interpreting a switching account while requiring different explanations. The cited text supports that separation without a waveform reading, recovery-time value or switching-loss comparison for the particular diode being described.

Keep MPS leakage control with its structure

The named MPS structure adds a specific static-field mechanism to the Schottky discussion. Infineon explains that the drift layer supports reverse voltage and also contributes resistance during forward conduction. Increasing its doping can reduce that resistive contribution, but the accompanying leakage consequence prevents the design question from being reduced to resistance alone. The conducting and blocking responsibilities belong to the same physical region while imposing different requirements.

In the generation 5 example, heavily doped p-type islands help shield the Schottky contact from the electric field. That shielding permits a different relationship between drift-layer resistance and leakage than the simpler structure discussed alongside it. The explanation concerns how the field reaches the contact, rather than a claim that a package outline identifies the internal doping or that any SiC-labelled part uses this arrangement.

MPS consequently needs its own structural description. A broad assertion that every SiC Schottky diode contains no PN-related structure would erase the very islands used in this example. Preserve the named design context when explaining the resistance and leakage tradeoff, without transferring a numerical improvement or present reverse-leakage result to another product or lot.

Distinguish ordinary conduction from MPS surge injection

Ordinary forward operation and a high-current surge need not use the structure in exactly the same way. Infineon's MPS account describes a higher-current condition in which the junction associated with the p-type islands becomes active and holes enter the drift region. The resulting forward behavior has a bipolar contribution. This is a change in the participation of the structure under the described condition, rather than evidence that the earlier ordinary-switching description was meaningless.

The two statements should retain their operating contexts. Majority-carrier switching describes the ordinary Schottky mechanism, while surge injection explains an additional response of this particular merged structure. Removing the high-current qualification would make the article appear to assign one unchanged carrier mechanism to every state. Equally, calling the surge response bipolar should not be used to replace the documented product identity with a generic silicon pin-diode description.

The useful distinction is how the named structure responds as conduction conditions change. It does not supply a permitted surge magnitude, duration or repetition rate. Infineon's historical example explains why the MPS feature matters, while an exact device's applicable ratings and any actual surge assessment remain separate evidence.

Separate thin-wafer heat flow from transient heat storage

Substrate thickness introduces an electrical and thermal tradeoff beyond the contact structure. Infineon describes the substrate as providing mechanical support while also contributing resistance. Reducing its thickness can shorten that resistive path. The same physical change can shorten the route by which heat leaves the active region toward the package, so the substrate participates in both conduction loss and heat transport.

Heat transport and heat storage are different properties. A shorter path can reduce thermal resistance, describing how readily heat passes toward the surrounding package. Thinning also reduces thermal capacitance close to the junction, describing how much transient thermal energy that nearby material can absorb for a corresponding temperature change. An improvement in sustained heat flow therefore does not automatically describe the same benefit during a brief surge.

This is why the historical article retains a compromise between lower forward drop and reduced near-junction heat storage. Keep those responsibilities visible rather than translating thin wafer into an unconditional thermal advantage. The explanation gives no thickness, temperature excursion or allowable pulse. It also establishes no present thermal result for an offered device whose exact construction and operating history have not been assessed.

Sources and further reading

Bounded Infineon December 2015 generation 5 MPS prose on physical pages 1–2 and ROHM's capacitive-current paragraph. Figures, numerical efficiency/surge results, package identification and actual-unit assessment are outside this explanation.