1. Separate Acquisition from Conversion Timing
Find the timing information for the exact converter and identify the acquisition interval. Keep it distinct from conversion duration and the transfer timing of the digital interface. TI's ADS8866 datasheet lists acquisition time as its own timing requirement. A detached throughput figure would leave out that field.
Ask the design owner to identify the converter operating mode and the relevant timing reference. Preserve the conditions associated with the timing table rather than carrying a figure from another mode or a related device. This article copies no timing values and supplies no calculation of an available settling budget.
A timing review record can show which interval the input chain must use and which assumptions are still pending. If only sample rate and resolution are known, obtain the remaining information before approving a candidate. The purpose is to define the input-settling question, rather than convert a catalogue performance label into a source-resistance limit.
2. Identify the Source and Driver Path
Identify the actual signal path from the source to the ADC input. Keep the source, driving amplifier and input filter as separate parts of the circuit description where they are present. The interface owner should be able to point to the relevant schematic and explain which configuration the review covers.
TI's ADS8866 input-driver discussion describes the driving amplifier and RC filter in relation to its switched-capacitor inputs. It addresses the interaction between the input chain and converter behavior. Use that discussion as a device-specific explanation of why the front end belongs in the review; do not treat its reference circuit as the only permitted design.
Keep source impedance information with its frequency or operating context when engineering provides it. A single description such as high impedance may be insufficient to support the decision. Mark missing information for clarification. This guide provides no measured source, selected amplifier, RC component values or reconstructed customer circuit.
3. Keep Settling Criteria with the Requirement
Ask engineering to specify what settling means for the intended signal and accuracy requirement. Record the relevant step or operating condition and the evidence used to assess it. The reviewer needs the requirement at the converter input, not simply the accuracy label of another component in the signal chain.
The ADS8866 application text connects input settling to the acquisition window and discusses source impedance within the filter and driver tradeoff. Preserve that relationship without turning its explanatory example into a universal impedance ceiling. A condition supporting one ADC and front end cannot be assigned to an unidentified replacement by analogy.
Classify the available evidence as a specification, reference design, simulation or actual measurement. The types answer different questions and should retain their own conditions. If evaluation is needed, identify the owner and remaining work. Do not write an assumed settling result into the requirement because a simulation model or application circuit can be downloaded.
4. Document Pending Front-End Evaluation
Summarise the complete input-chain question using the ADC code, timing reference, source/driver/filter configuration and required settling criterion. Keep each unresolved item visible. That makes an alternative proposal assessable without pretending that its nominal resolution and sample rate complete the analog review.
Retain any engineering evaluation against the circuit revision it actually covers. A typical manufacturer design is a reference for investigation, while acceptance of the released front end is a separate decision. This article reports neither a simulation nor a board test. It also does not specify a permissible source resistance for the reader's equipment.
For an ICULTRA sourcing discussion, identify the approved converter and proposed alternatives separately. Include the authorised technical requirement and the public references supporting the acquisition review. Use the related op-amp guide for the different voltage-range question; an acceptable input range does not itself settle this timing decision. Keep engineering approval distinct from a supplier offer and preserve the accepted requirement in the BOM.
Sources and further reading
TI ADS8866 documentation supports the acquisition and input-chain discussion. No timing value, source-impedance limit, RC design, simulation or customer settling result is supplied.